1. Field of the Invention
This invention relates to a method of manufacturing a field-effect transistor of the "normally off" type (as defined below), which can be employed as a saturable resistor when provision is not made for a control gate, as well as the manufacture of logic circuits which make use of at least one resistor and/or a transistor having said structure.
2. Descrition of the Prior Art
At the present time, all integrated circuits on GaAs (gallium arsenide) are fabricated from transistors either of the junction field-effect type (JFET) or of the Schottky gate type (MESFET).
Transistors are of two types: normally conducting transistors, in which the drain-source current is cut-off by pinching the normally existing channel (depletion transistors) by applying a suitable voltage; and the normally closed transistors, in which the channel is opened by applying a suitable gate voltage (enhancement transistors).
The depletion mode-type transistor suffers from the disadvantage of high power consumption. Moreover, the input voltage V.sub.GS (gate-source potential difference) and the output voltage V.sub.DS (drain-source potential difference) are of opposite polarity. In the case of an n-type channel, the cut-off voltage is negative whereas the supply voltage is positive. Consequently, provision has to be made for two supply sources.
In enhancement mode-type transistors, it is necessary to control the value of the threshold voltage or minimum turn-on voltage, and therefore of doping and of thickness of the active zone (in which the channel is formed). Fabrication is a very delicate process and results in a high proportion of production rejects.
The invention makes it possible to overcome the above-mentioned disadvantages by means of a structure wherein the channel comprises a notch or groove.